CMOS VLSI Design & Sub Systems of Digital Circuits

     Learn how to master on VLSI system Design &  SubSystems of Digital  Circuits and designing of different circuits like combinational and sequential etc. In this course you will  learn very large scale integration design course  from scratch and also covered  each and every details with step by step procedure. Now a days  very large scale integration  technology emerging or growing  day by day. You cannot imagine without the Basic VLSI Design &  SubSystems of Digital  Circuits or even electronics and   integrated circuits because usage of electronic gadgets now becoming a part in our daily routines. So  we much depend on VLSI system Design &  SubSystems of Digital  Circuits  to design like portable electronic gadgets  and other gadgets for different purposes. The  silicon-integrated circuitry make it possible to  design of digital circuits which may be very complex and most  economical in space, power requirements and cost, and potentially very fast The area, power and cost have made silicon the dominant fabrication technology for electronics in very wide ranging areas of application. Like digital signal processing, analog and digital communications as well as in  video processing etc. Metal oxide semiconductor (MOS)  related circuitry will meet requirements but still it is  being researched  by ongoing improvements and the research in fabrication such that  other techniques are being majorly adapted with gallium arsenide technology, including the use of materials other than silicon for the production of integrated circuits. . So its needed to learn  VLSI system Design &  SubSystems of Digital  Circuits for better growth particularly for electronics and computer related people. So those who want to settle in VLSI  design field  learning these concepts is essential .so start your journey with this course from now onwards.

In this course you may learn the behavior of MOS circuits  in detail manner as well as you could  get the better understanding after completion of this course.

The course covers these topics

Basic Electrical Properties of metal oxide semiconductor(MOS) and  Bipolar and metal oxide semiconductor circuits

Current and voltage relationship and its characteristics

The Non-saturated region

Saturated region

Metal oxide semiconductor  transistor transconductance  and output conductance  relationship.

The pass transistor

Inverter characteristics

Determination of pull up to pull down ration for an NMOS driven by another NMOS inverter.

Pull up to pull down ratio for an NMOS  Inverter driven by another NMOS inverter using the pass transistor.

Complementary metal oxide semiconductor as  inverter and its characteristics

Transconductance and output conductance

Alternative forms of pull ups

Bipolar and Complementary metal oxide semiconductor inverter circuits.

MOS  layers and NMOS color encoding with STICK AND mask layout schemes

MOS layers and CMOS color encoding with STICK and mask layout schemes

Stick diagram rule set

Nmos inverter schematic and stick diagram

NAND schematic and stick diagrams

Operation of not nor or gates

Stick diagram for NOR and OR gate

Cmos inverter schematic and stick diagram

CMOS NAND schematic and stick diagram

CMOS NAND twisted stick diagram and other modified models of sticks for NAND.

CMOS NAND operation.

CMOS NOR operation and stick diagram

Why design rules needed?

lambda based layout rules

CMOS inverter and CMOS- NAND layouts

CMOS- NOR layout

Sheet resistance

Sheet resistance applied to Mos transistors

Sheet resistance for depletion mode MOS inverter

Sheet resistance for CMOS inverter

Area capacitance of layers and standard capacitance in different technologies

Some area capacitances

Multil layer area capacitance

Time delay in MOS circuits

Inverter pair delay using NMOS

CMOS inverter pair delay

Rise time estimation delay

Fall time estimation dealy and relation b/w rise and fall time

Driving of large capacitive loads

Cascaded of inverter for N-even and odd conditions

Condition of pair delay to cascaded inverters for NMOS

Condition of pair delay for CMOS cascaded inverter

What is Super buffers ?

Super buffers in inverting mode &  non inverting mode

What is scaling & Scaling for device parameters

Parity generator and its block diagram &Parity generator iin one-bit cell

Implementation of Parity generator with Nmos and CMOS along with stick diagram

What is Bus Arbitration logic and types of Bus arbitration logic?

Bus arbitration logic ,truth table,logic expression,stick diagram, n-bit BAL

Design of Multiplexers 2:1 and 4:1 with schematic and stick diagram

Design of 4 bit adder (Ripple carry adder)

design of 4 bit adder (Ripple carry adder)

Design of carry look ahead adder with CMOS schematic diagram-part2

Feel free to ask any doubt while learning the course

Happy learning!

Skill Gems Education

PUDI V V S NARAYANA